1. Technical Field
The disclosure relates to a capacitor. More particularly, the disclosure relates to a solid electrolytic capacitor with low parasitic inductance and a circuit board having the same.
2. Background
The development of portable products aims at light weight, compactness, miniaturization, high-speed, low power consumption and multiple functionality. In recent years, as the IC processing technology keeps improving and the signal transmission speed keeps increasing, the interferences of simultaneous switching power noises become more severe for the printed circuit board or IC carrier board transmitting signals of higher frequencies. The common approach for lowering the power noises is to place SMD capacitors, also called decoupling capacitors or bypass capacitors, near the power/ground pin(s). By doing so, the electrical energy stored in the capacitors is supplied when electrical energy is insufficient, so as to absorb the glitch, lower the power noises and stabilize the power source.
However, for the future circuit systems of multiple functionality, the noise bandwidth becomes broader. Under the restricted area of the IC carrier board, limited amounts of SMD capacitors may be used, which will be the bottleneck for the common approach for lowering the power noises. For the embedded capacitor substrates, such as certain capacitors of metal-insulator-metal (MIM) structures, the available capacitance per area unit is unable to satisfy the large capacitance requirements of CPU carrier boards.